1、1.Electrical Specification 1-1 Test condition Varistor voltage In=1 mA DC Leakage current Vdc=5.0V DC Maximum clamping voltage Ic=1 A Rated peak single pulse transient current 8/20 waveform,+/-each 1 time induce Capacitance 10/1000 waveform Insulation resistance after reflow soldering f=1MHz,Vrms=0.
2、5 V Reflow soldering condition Soldering paste:Tamura(Japan)RMA-20-21L Stencil:SUS,120 thickness Pad size:0.5(Width)x 0.6(Length)0.5(Distance between pads)Soldering profile:2605,5 sec.1-2 Electrical specification Maximum allowable continuous DC voltage 5.0 V trigger voltage/Varistor voltage/breakdow
3、n voltage 100-150 V Maximum clamping voltage 200 V Maximum Rated peak single pulse transient current 1 A Maximum Nonlinearity coefficient 12 Leakage current at continuous DC voltage 0.1 Response time 0.5 ns Varistor voltage temperature coefficient 0.05%/Capacitance measured at 1MHz 2.5-4.5 pF Typica
4、l Capacitance tolerance-50 to+50%Insulation resistance after reflow soldering on PCB 10 M Operating ambient temperature -55 to+125 Storage temperature-55 to+125 PESD0542L003Rev: 01.06.20161/5 1-3 Reliability testing procedures Reliability parameter Test Test methods and remarks Test requirement Puls
5、e current capability Imax 8/20 IEC 1051-1,Test 4.5.10 pulses in the same direction at 2 pulses per minute at maximum peak current dVn/Vn10%no visible damage Electrostatic discharge capability ESD C=150 pF,R=330 IEC 1000-4-2 Each 10 times in positive/negative direction in 10 sec at 8KV contact discha
6、rge(Level 4)dVn/Vn10%no visible damage Environmental reliability Thermal shock IEC 68-2-14 Condition for 1 cycle Step 1:Min.40,303 min.Step 2:Max.+125,303 min.Number of cycles:30 times dVn/Vn5%no visible damage Low temperature IEC 68-2-1 Place the chip at-405 for 100012hrs.Remove and place for 242hr
7、s at room temp.condition,then measure dVn/Vn5%no visible damage High temperature IEC 68-2-2 Place the chip at 1255 for 100024hrs.Remove and place for 242hrs at room temp.condition,then measure dVn/Vn5%no visible damage Heat resistance IEC 68-2-3 Apply the rated voltage for 100048hrs at 853.Remove an
8、d place for 242hrs at room temp.condition,then measure dVn/Vn5%no visible damage Humidity resistance IEC 68-2-30 Place the chip at 402 and 90 to 95%humidity for 100024hrs.Remove and place for 242hrs at room temp.condition,then measure dVn/Vn10%no visible damage Pressure cooker test Place the chip at
9、 2 atm,120,85%RH for 60 hrs.Remove and place for 242hrs at room temp.condition,then measure dVn/Vn10%no visible damage Operating life Apply the rated voltage for 100048hrs at 1253.Remove and place for 242hrs at room temp.condition,then measure dVn/Vn10%no visible damage PESD0542L003Rev: 01.06.20162/
10、5 Mechanical Reliability Solderability IEC 68-2-58 Solder bath method,2305,2s At least 95%of terminal electrode is covered by new solder Resistance to soldering heat IEC 68-2-58 Solder bath method,2605,100.5s,2705,30.5s dVn/Vn5%no visible damage Bending strength IEC 68-2-21 Warp:2mm,Speed:0.5mm/sec,
11、Duration:10sec.The measurement shall be made with board in the bent position dVn/Vn5%no visible damage Adhesive strength IEC 68-2-22 Applied force on SMD chip by fracture from PCB Strength10 N no visible damage 2.Material Specification Body ZnO based ceramics Internal electrode Silver Palladium Exte
12、rnal electrode Silver Nickel Tin Thickness of Ni/Sn plating layer Nickel 1,Tin 2 3.Dimension Specification 4.Soldering Recommendations 4-1 Soldering profile Size L(mm)W(mm)T(mm)M(mm)0402 1.00.10 0.50.10 0.6 0.200.10 0603 1.60.15 0.80.15 0.9 0.350.10 PESD0542L003Rev: 01.06.20163/54-1-1 Pb free solder
13、 paste 4-1-2 Repair soldering -Allowable time and temperature for making correction with a soldering iron:350 10,3 sec.-Optimum solder amount when corrections are made using a soldering iron 4-2 Soldering guidelines -Our chip varistors are designed for reflow soldering only.Do not use flow soldering
14、-Use non-activated flux(Cl content 0.2%max.)-Follow the recommended soldering conditions to avoid varistor damage.PESD0542L003Rev: 01.06.20164/54-3 Solder pad layout 5.Storage condition -Storage environment must be at an ambient temperature of 2535 and an ambient humidity of 4060%RH-Chip varistors c
15、an experience degradation of termination solderability when subjected to high temperature of humidity,or if exposed to sulfur or chlorine gases.-Avoid mechanical shock(ex.Falling)to the chip varistor to prevent mechanical cracking inside of the ceramic dielectric due to its own weight.-Use chips within 6 months.If 6 months of more have elapsed,check solderability before use.-6.Description about package label Qunatity:10,000 pcs-Quantity of shipping chip varistor PESD0542L003Shanghai Leiditech Electronic Co.,Ltd Email: Tel:+86-021 50828806 Fax:+86-021 50477059 Rev: 01.06.20165/5
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