1、LOW CAPACITANCE TVS DIODE ARRAY Features Ultra low leakage:nA levelOperating voltage:5VLow clamping voltageComplies with following standards:IEC 61000-4-2(ESD)immunity testAir discharge:20kV Contact discharge:20kV IEC61000-4-4(EFT)40A(5/50ns)IEC61000-4-5(Lightning)5A(8/20 s)RoHS CompliantApplication
2、s USB 2.0 power and data lineSet-top box and digital TVDigital video interface(DVI)Notebook ComputersSIM Ports10/100/1000 Ethernet Dimensions SOT-26 Pin Configuration Mechanical Characteristics Package:SOT-26Lead Finish:Lead FreeUL Flammability Classification Rating 94V-0Quantity Per Reel:3,000pcsRe
3、el Size:7inchAbsolute Maximum Ratings(Tamb=25C unless otherwise specified)Parameter Symbol Value Unit Peak Pulse Power(8/20s)Ppp350WESD per IEC 6100042(Air)VESD 20KvESD per IEC 6100042(Contact)20 Operating Temperature Range TJ-55 to+125 Storage Temperature Range TSTJ-55 to+150 Rev:01.06.2014 1/7AEC-
4、Q101 qualified.Device Marking:V05 TESDS5V0AElectrical Characteristics(TA=25C unless otherwise specified)Characteristic Curves Fig1.8/20s Pulse Waveform051015202530120tr100806040200Peak Value IPPtd=t IPP/2TESTWAVEFORMPARAMETERStr=8 std=20 st-Time(s)IPP-Peak Pulse Current-%of IPPFig3.Power Derating Cu
5、rve0255075100125150110100403020100%of Rated Power9080706050Ambient Temperature TA(C)Fig2.ESD Pulse Waveform(according to IEC 61000-4-2)60ns10%Percent of Peak Pulse Current%30nstr=0.71nsTime(ns)90%100%Rev:01.06.2014 2/7 Parameter Symbol Min Typ Max Unit Test Condition Reverse Working Voltage VRWM 5 V
6、 Breakdown Voltage VBR 6 V IT=1mA Reverse Leakage Current IR 1 A VRWM=5V Clamping Voltage VC 15 V IPP=1A(8 x 20 s pulse)Clamping Voltage VC 28 V IPP=5A(8 x 20 s pulse)Junction Capacitance CJ 0.5 pF V =0V,f=1MHz RTESDS5V0A Figure 1.Data Line and Power Supply Protection Using VCC as reference Figure 2
7、.Data Line Protection with Bias and Power Supply Isolation Resistor Figure 3.Data Line Protection Using Internal TVS Diode as Reference Device Connection Options for Protection of Four High-Speed Data Lines The TESDS5V0A is designed to protect four data lines from transient over-voltages by clamping
8、 them to a fixed reference.When the voltage on the protected line exceeds the reference voltage(plus diode VF)the steering diodes are forward biased,conducting the transient current away from the sensitive circuitry.Data lines are connected at pins 1,3,4 and 6.The negative reference(REF1)is connecte
9、d at pin 2.This pin should be connected directly to a ground plane on the board for best results.The path length is kept as short as possible to minimize parasitic inductance.The positive reference(REF2)is connected at pin 5.The options for connecting the positive reference are as follows:1.To prote
10、ct data lines and the power line,connect pin 5 directly to the positive supply rail(VCC).In this configuration the data lines are referenced to the supply voltage.The internal TVS diode prevents over-voltage on the supply rail(See Figure1).2.The TESDS5V0A can be isolated from the power supply by add
11、ing a series resistor between pin 5 and VCC.A value of 100k is recommended.The internal TVS and steering diodes remain biased,providing the advantage of lower capacitance(See Figure2).3.In applications where no positive supply reference is available,or complete supply isolation is desired,the intern
12、al TVS may be used as the reference.In this case,pin 5 is not connected.The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of the TVS(plus one diode drop)(See Figure3).Applications Information Rev:01.06.2014 3/7TESDS5V0AFigure 4Video Interfac
13、e Protection Figure 5-Dual USB Port Protection Figure 6-SIM Port Video Interface Protection Video interfaces are susceptible to transient voltages resulting from electrostatic discharge(ESD)and“hot plugging”cables.If left unprotected,the video interface IC may be damaged or even destroyed.Protecting
14、 a high-speed video port presents some unique challenges.First,any added protection device must have extremely low capacitance and low leakage current so that the integrity of the video signal is not compromised.Second,the protection component must be able to absorb high voltage transients without d
15、amage or degradation.As a minimum,the device should be rated to handle ESD voltages per IEC61000-4-2,level 4(15kV air,8kV contact).The clamping voltage of the device(when conducting high current ESD pulses)must be sufficiently low enough to protect the sensitive CMOS IC.If the clamping voltage is to
16、o high,the“protected”device may latch-up or be destroyed.Finally,the device must take up a relatively small amount of board space,particularly in portable applications such as notebooks and handhelds.The TESDS5V0A is designed to meet or exceed all of the above criteria.A typical video interface prot
17、ection circuit is shown in Figure 4.All exposed lines are protected including R,G,B,H-Sync,V-Sync,and the ID lines for plug and play monitors.Universal Serial Bus ESD Protection The TESDS5V0A may also be used to protect the USB ports on monitors,computers,peripherals or portable systems.Each device
18、will protect up to two USB ports(Figure5).When the voltage on the data lines exceed the bus voltage(plus one diode drop),the internal rectifiers are forward biased conducting the transient current away from the protected controller chip.The TVS diode directs the surge to ground.The TVS diode also ac
19、ts to suppress ESD strikes directly on the voltage bus.Thus,both power and data pins are protected with a single device.SRV05-4 SRV05-4 SRV05-4 SRV05-4 Applications Information(Continue)Applications Information (Continue)Rev:01.06.2014 4/7TESDS5V0AFigure 7 shows how to design the TESDS5V0A into the
20、DVI circuit on a flat panel display and a PC graphic card.The TESDS5V0A is configured to provide common mode and differential mode protection.The internal TVS of the TESDS5V0A acts as a 5 volt reference.The power pin of the DVI circuit does not come out through the connector and is not subjected to
21、external ESD pulse;therefore,pin 5 should be left unconnected.Connecting pin 5 to Vcc of the DVI circuit may result in damage to the chip from ESD current.10/100 ETHERNET PROTECTION Ethernet ICs are vulnerable to damage from electro-static discharge(ESD).The internal protection in the PHY chip,if an
22、y,often is not enough due to the high energy of the discharges specified by IEC 61000-4-2.If the discharge is catastrophic,it will destroy theprotected IC.If it is less severe,it will cause latent failures that are very difficult to find.10/100 Ethernet operates at 125MHz clock over a twisted pair i
23、nterface.In a typical system,the twisted-pair interface for each port consists of two differential signal pairs:one for the transmitter and one for the receiver,with the transmitter input being the most sensitive to damage.The fatal discharge occurs differentially across the transmit or receive line
24、 pair and is capacitively coupled through the transformer to the Ethernet chip.Figure 8 shows how to design the TESDS5V0A on the line side of a 10/100 ethernet port to provide differential mode protection.The common mode isolation of the transformer will provide common mode protection to the rating
25、of the transformer isolation which is usually 1.5kV.If more common mode protection is needed,figure 9 shows how to design the TESDS5V0A on the IC side of the 10/100.Figure 7.Digital Video Interface(DVI)Protection Applications InformationDVI Protection The small geometry of a typical digital-visual i
26、nterface(DVI)graphic chip will make it more susceptible to electrostatic discharges(ESD)and cable discharge events(CDE).Transient protection of a DVI port can be challenging.Digital-visual interfaces can often transmit and receive at a rate equal to or above 1Gbps.The high-speed data transmission re
27、quires the protection device to have low capacitance to maintain signal integrity and low clamping voltage to reduce stress on the protected IC.The TESDS5V0A has a low typical insertion loss of 0.4dB at 1GHz(I/O to ground)to ensure signal integrity and can protect the DVI interface to the 8kV contac
28、t and 15kV air ESD per IEC 61000-4-2 and CDE.(Continue)Applications Information (Continue)Rev:01.06.2014 5/7TESDS5V0ARev:01.06.2014 Figure 8-10/100 Ethernet Differential Protection Figure 9-10/100 Ethernet Differential and Common Mode Protection Applications Information(Continue)Applications Informa
29、tion (Continue)6/7TESDS5V0AShanghai Leiditech Electronic Co.,Ltd Email: Tel:+86-021 50828806 Fax:+86-021 50477059 Rev:01.06.2014 Inches Millimeters Symbol Min.Nom.Max.Min.Nom.Max.A 0.035-0.057 0.90-1.45 A1 0.000-0.006 0.00-0.15 A2 0.035 0.045 0.051 0.90 1.15 1.30 b 0.010-0.020 0.25-0.50 c 0.003-0.00
30、9 0.08-0.22 D 0.110 0.114 0.122 2.80 2.90 3.10 E1 0.060 0.063 0.069 1.50 1.60 1.75 E 0.110 BSC 2.80 BSC e 0.037 BSC 0.95 BSC e1 0.075 BSC 1.90 BSC L 0.012 0.018 0.024 0.30 0.45 0.60 L1(0.024)(0.60)0-10 0-10 aaa 0.004 0.10 bbb 0.008 0.20 ccc 0.008 0.20 Symbol Inches Millimeters C(0.098)(2.50)G 0.055 1.40 P 0.037 0.95 X 0.024 0.60 Y 0.043 1.10 Z 0.141 3.60 Soldering Footprint SOT-26 Package Outline&Dimensions 7/7TESDS5V0A